Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-10-11
2005-10-11
Thai, Luan (Department: 2891)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S627000, C438S638000, C438S634000, C257S774000
Reexamination Certificate
active
06953745
ABSTRACT:
A metal interconnection structure includes a lower metal interconnection layer disposed in a first inter-layer dielectric layer. An inter-metal dielectric layer having a via contact hole that exposes a portion of surface of the lower metal layer pattern is disposed on the first inter-layer dielectric layer and the lower metal layer pattern. A second inter-layer dielectric layer having a trench that exposes the via contact hole is formed on the inter-metal dielectric layer. A barrier metal layer is formed on a vertical surface of the via contact and the exposed surface of the second lower metal interconnection layer pattern. A first upper metal interconnection layer pattern is disposed on the barrier metal layer, thereby filling the via contact hole and a portion of the trench. A void diffusion barrier layer is disposed on the first metal interconnection layer pattern and a second upper metal interconnection layer pattern is disposed on the void diffusion barrier layer to completely fill the trench.
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Ahn Jeong-hoon
Lee Hyo-jong
Lee Kyoung-woo
Lee Kyung-tae
Lee Soo-geun
Samsung Electronics Co,. Ltd.
Thai Luan
Volentine Francos & Whitt PLLC
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