Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2003-04-24
2004-08-03
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S328000, C257S302000, C257S334000, C438S424000
Reexamination Certificate
active
06770539
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a vertical type MOSFET and a manufacturing method thereof, in particular, in which its drift resistance is made to be low without lowering the breakdown voltage between source and drain electrodes.
DESCRIPTION OF THE RELATED ART
FIG. 1
is a sectional view showing the structure of a conventional general use vertical type MOSFET. As shown in
FIG. 1
, at this vertical type MOSFET, an N
−
type epitaxial layer
202
, which is a high resistance drift layer, is formed on one surface of an N
+
type semiconductor substrate
201
. P type base layers
203
are formed in the surface of the N
−
type epitaxial layer
202
, and N
+
type source layers
204
are formed in designated regions in the P type base layers
203
and a P
+
type base layer
205
is formed in a specified region of the P type base layers
203
. Trenches
207
are formed in designated regions of the P type base layers
203
from the surface, and in each of the trenches
207
, a gate insulation film
208
is formed and gate poly-silicon
209
is filled, and a trench type gate electrode
206
is formed. On a dielectric interlayer
210
covering the surface of the trench type gate electrodes
206
, a source electrode
211
, which is connected to the N
+
type source layers
204
and the P
+
type base layer
205
, is formed. A drain electrode
212
is formed on the other surface of the N
+
type semiconductor substrate
201
.
At this type of the vertical type MOSFET, in order to make the drift resistance low, it is desirable that the concentration of the impurity in the N
−
type epitaxial layer
202
(high resistance drift layer) is set to be high. However, when a voltage is applied between the source electrode
211
and the drain electrode
212
, a depletion layer occurs only in the vertical direction between the P type base layer
203
and the high resistance drift layer
202
. Therefore, the electric field strength exceeds the critical electric field during extending the depletion layer, and the electric field centralization, which is one of the causes of lowering the breakdown voltage between the source electrode
211
and the drain electrode
212
, is liable to occur. Consequently; in order to secure a certain value of the breakdown voltage between the source electrode
211
and the drain electrode
212
, there is a problem that the concentration of the impurity in the high resistance drift layer
202
cannot be made to be a value being more than a specified value.
In order to solve this problem, there are conventional vertical type MOSFETs in which the drift resistance is lowered and the breakdown voltage between the source electrode and the drain electrode is made to be high. For example, as a first conventional technology, Japanese Patent Application Laid-Open No. 2001-119022 discloses a semiconductor device and a manufacturing method thereof.
FIG. 2
is a sectional view showing the structure of the vertical type MOSFET at the first conventional technology. In
FIG. 2
, each of the parts being equivalent to one of the parts shown in
FIG. 1
has the same reference number, therefore the same explanation is omitted. This vertical type MOSFET has planar type gate electrodes and the gate electrodes are not the trench type gate electrodes.
As shown in
FIG. 2
, plural P
−
type layers
213
are layered in the high resistance drift layer
202
at the positions right under the P type base layer
203
in the vertical direction (in the depth direction). That is, PN junctions being in parallel to the high resistance drift layer
202
are formed. By this structure, at the time when a voltage is applied between the source electrode
211
and the drain electrode
212
in a state that the vertical type MOSFET is off, a depletion layer occurs not only in the vertical direction between the P type base layer
203
and the high resistance drift layer
202
but also in the horizontal direction between the plural P
−
type layers
213
and the high resistance drift layer
202
. With this structure, compared with a vertical type MOSFET in which the plural P
−
type layers
213
are not formed, the concentration of the impurity in the high resistance drift layer
202
can be set to be high even at the same breakdown voltage, and the drift resistance can be lowered. And with this structure, a vertical type MOSFET whose breakdown voltage is larger than 500V can be obtained.
As a second conventional technology, Japanese Patent Application Laid-Open No. 2000-260982 discloses a semiconductor device and a manufacturing method thereof.
FIG. 3
is a sectional view showing the structure of the vertical type MOSFET at the second conventional technology. In
FIG. 3
, each of the parts being equivalent to one of the parts shown in
FIG. 1
has the same reference number, therefore the same explanation is omitted. This vertical type MOSFET has planar type gate electrodes and the gate electrodes
206
are not the trench type gate electrodes.
As shown in
FIG. 3
, a trench
214
is formed in the N
−
type epitaxial layer
202
being the high resistance drift layer in the vertical direction, and a P
−
type epitaxial layer
215
, which connects to the P type base layer
203
, is grown in the trench
214
. With this, a PN junction being in parallel to the high resistance drift layer
202
is formed. By this structure, at the second conventional technology, as the same as at the first conventional technology, the concentration of the impurity in the high resistance drift layer
202
can be set to be high and the drift resistance can be lowered by securing a certain value of the breakdown voltage.
However, at the first conventional technology, each of the plural P
−
type layers
213
is continuously formed in the thickness direction of the high resistance drift layer
202
. In order to form this, after a thin N
−
type epitaxial layer
202
was grown, a P type impurity is implanted in this thin N
−
type epitaxial layer
202
, and this process is repeated in plural times and each of the plural P
−
type layers
213
is formed in each of the plural thin N
−
type epitaxial layers
202
. That is, a layered structure is required. After this, the P type impurity is activated by a thermal process, and the high resistance drift layer
202
having a certain thickness is formed. Consequently, the plural P
−
type layers
213
can be formed in the vertical direction in a long and deep state, however, there are problems that the number of the processes becomes large and the cost becomes high.
At the second conventional technology, etching for the trench
214
is executed selectively from the surface of the N
−
type epitaxial layer
202
, and the P
−
type epitaxial layer
215
is grown in the trench
214
and embedded. Therefore, technologies to form the deep trench by etching and to grown the epitaxial layer selectively have some difficulties, consequently there is a problem that the cost becomes high.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a vertical type MOSFET and a manufacturing method thereof, in particular, in which its drift resistance is made to be low by securing its breakdown voltage between source and drain electrodes of about 150 V being the middle class breakdown voltage and its manufacturing method is easy and its manufacturing cost is low.
According to a first aspect of the present invention, for achieving the object mentioned above, there is provided a vertical type MOSFET. The vertical type MOSFET provides a high resistance drift layer being a conductivity type on a substrate being a conductivity type and base layers being an opposite conductivity type in designated regions of the surface of the high resistance drift layer and source layers being a conductivity type in the base layers and gate electrodes on specified regions of the surface of the high resistance drift layer. Further the vertical type MOSFET provides a trench typ
NEC Electronics Corporation
Trinh Hoa B.
Young & Thompson
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