Vertical SOI trench SONOS cell

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE29131

Reexamination Certificate

active

08008713

ABSTRACT:
A semiconductor memory device in which a vertical trench semiconductor-oxide-nitride-oxide-semiconductor (SONOS) memory cell is created in a semiconductor-on-insulator (SOI) substrate is provided that allows for the integration of dense non-volatile random access memory (NVRAM) cells in SOI-based complementary metal oxide semiconductor (CMOS) technology. The trench is processed using conventional trench processing and it is processed near the beginning of the inventive method that allows for the fabrication of the memory cell to be fully separated from SOI logic processing.

REFERENCES:
patent: 5424569 (1995-06-01), Prall
patent: 6172391 (2001-01-01), Goebel et al.
patent: 6352882 (2002-03-01), Assaderaghi et al.
patent: 6777737 (2004-08-01), Mandelman et al.
patent: 6787419 (2004-09-01), Chen et al.
patent: 7129130 (2006-10-01), Adkisson et al.
patent: 7294543 (2007-11-01), Cheng et al.
patent: 2007/0045697 (2007-03-01), Cheng et al.
patent: 2008/0057647 (2008-03-01), Ho et al.
Swift et al., “An Embedded 90nm SONOS Nonvolatile Memory Utilizing Hot Electron Programming and Uniform Tunnel Erase” IEDM Technogolical Digest (2002) pp. 927-930.

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