Vertical-channel junction field-effect transistors having...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

Reexamination Certificate

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C438S195000, C257SE21421

Reexamination Certificate

active

07638379

ABSTRACT:
Semiconductor devices and methods of making the devices are described. The devices can be implemented in SiC and can include epitaxially grown n-type drift and p-type trenched gate regions, and an n-type epitaxially regrown channel region on top of the trenched p-gate regions. A source region can be epitaxially regrown on top of the channel region or selectively implanted into the channel region. Ohmic contacts to the source, gate and drain regions can then be formed. The devices can include edge termination structures such as guard rings, junction termination extensions (JTE), or other suitable p-n blocking structures. The devices can be fabricated with different threshold voltages, and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used as discrete power transistors and in digital, analog, and monolithic microwave integrated circuits.

REFERENCES:
patent: 4587712 (1986-05-01), Baliga
patent: 5264713 (1993-11-01), Palmour
patent: 5391895 (1995-02-01), Dreifus
patent: 5468661 (1995-11-01), Yuan et al.
patent: 5747842 (1998-05-01), Plumton
patent: 5909110 (1999-06-01), Yuan et al.
patent: 5910665 (1999-06-01), Plumton et al.
patent: 6097046 (2000-08-01), Plumton
patent: 6344663 (2002-02-01), Slater, Jr. et al.
patent: 6503782 (2003-01-01), Casady et al.
patent: 6767783 (2004-07-01), Casady et al.
patent: 7105875 (2006-09-01), Singh
patent: 7119380 (2006-10-01), Sankin et al.
patent: 2003/0042538 (2003-03-01), Kumar et al.
patent: 2005/0067630 (2005-03-01), Zhao
patent: 00/38246 (2000-06-01), None
“Top Performance of SiC Power Transistor Designed for Inverters,” Translation of AIST press released on Mar. 28, 2005.
J. W. Palmour, et al., “Low-frequency noise in 4H—silicon carbide junction field effect transistors,” Appl. Phys. Lett. vol. 68, No. 19, May 6, 1996.
P.G. Neudeck, et al., “600° C. Logic Gates Using Silicon Carbide JFET's,” NASA/TM-2000-209928, National Aeronautics and space Administration, Glenn Research Center, pp. 1-4.
J. N. Merrett, et al., “Gamma and Proton Irradiation Effects on 4H-SiC Depletion-Mode Trench JFETs,” Materials Science Form, vols. 483-485, pp. 885-888, 2005.
L. Cheng, et al., “Cryogenic and High Temperature Performance of 4H-SiC Vertical Junction Field Effect Transistors (VJFETs) for Space Applications,” Proceedings of The 17th International Symposium on Power Semiconductor Devices and ICs (ISPSD '05), May 22-26, 2005, Santa Barbara, CA.
J.N. Merrett, et al., “Silicon Carbide Vertical Junction Field Effect Transistors Operated at Junction Temperatures Exceeding 300° C.,” Proceedings of IMAPS International Conference and Exhibition on High Temperature Electronics (HiTECH 2004), May 17-20, 2004, Santa Fe, NM.
S. Onda, et al., “SiC Integrated MOSFETs,” Phys. Stat. Sol. (a), vol. 162, p. 369-388, 1997.
N. Nordell, et al., “Homoepitaxy of 6H and 4H SiC on nonplanar substrates,” Appl. Phys. Lett., vol. 72, No. 2, pp. 197-199, Jan. 12, 1998.
Y. Chen, et al., “Homoepitaxial Growth of 4H-SiC on Trenched Substrates by Chemical Vapor Deposition,” Mater. Sci. Forum, vol. 457-460, pp. 189-192, 2004.
K. Shenai, et al., “Optimum Semiconductors for High Power Electronics”, IEEE Transactions on Electron Devices, vol. 36, No. 9, pp. 1811-1823, 1989.
Chen, Yi, “Homoepitaxial Growth of 4H-SiC on Trenched Substrates by Chemical Vapor Deposition,” Materials Science Forum, vols. 457-460 (2004), pp. 189-192.
Cheng, L., “Cryogenic and High Temperature Performance of 4H-SiC Vertical Junction Field Effect Transistors (VJFETs) for Space Applications,” Proceedings of the 17thInternational Symposium on Power Semiconductor Devices & IC's, May 23-26, 2005.
Merrett, J.N., “Silicon Carbide Vertical Junction Field Effect Transistors Operated at Junction Temperatures Exceeding 300° C.,”Dept. of Electrical and Computer Engineering, Mississippi State University.
Merrett, J.N., “Gamma and Proton Irradiation Effects on 4H-SIC Depletion-Mode Trench JFETs,” Materials Science Form, vols. 483-485 (2005), pp. 885-888.
Neudeck, Philip G. et al., “600° C. Logic Gates Using Silicon Carbide JFET's,” NASA/TM-2000-209928, National Aeronautics and Space Administration, Glenn Research Center., pp. 1-4.
Nordell, N. et al., “Homoepitaxy of 6H and 4H SiC on nonplanar substrates,” Appl. Phys. Lett. 72 (2), Jan. 12, 1998.
Onda, S. et al., “SiC Integrated MOSFETs,” Phys. Stat. Sol. (a), 162, (1997), pp. 369-388.
Palmour, J.W., “Low-frequency noise in 4H-silicon carbide junction field effect transistors,” Appl. Phys. Lett. 68 (19), May 6, 1996.
“Top Performance of SiC Power Transistor Designed for Inverters,” Translation of AIST press released on Mar. 28, 2005.
Mihalla, et al., “Buried field rings - a novel edge termination method for 4H-SiC high voltage devices,” Semiconductor Conference, vol. 2, pp. 245-248 (2002).

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