Variable bitline precharge voltage sensing technique for DRAM st

Details Variable bitline precharge voltage sensing technique for DRAM st Variable bitline precharge voltage sensing technique for DRAM st

1992-10-30

1994-08-16

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Precharge

365210, G11C 700

Patent

active

053392744

ABSTRACT:
A sensing technique uses a variable precharge voltage sensing with a single bitline swing in a DRAM cell or array of DRAM cells so that the power dissipation is reduced. The bitline precharge voltage varies from one RAS cycle to the next RAS cycle depending upon the level of the data in the accessed cells. Such an arrangement eliminates the need for a reference voltage generator since the precharge voltage is not the same voltage for each RAS cycle.

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D. W. Plass, "Data Bus Sense AMP With Switched Isolators", IBM Technical Disclosure Bulletin, vol. 27, No. 2, Jul. 1984.

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