Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1997-04-09
1998-10-06
Breneman, R. Bruce
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
438723, 438724, 438743, 438744, 134 12, H01L 21302
Patent
active
058175792
ABSTRACT:
A method for forming a via through a silicon oxide layer. There is first provided a substrate. There is then formed over the substrate a patterned silicon nitride layer which defines a contact beneath the patterned silicon nitride layer. There is then formed over the patterned silicon nitride layer a silicon oxide layer. There is then etched the silicon oxide layer through a first reactive ion etch (RIE) method employing a first etchant gas composition comprising a fluorocarbon etchant gas to form: (1) an etched silicon oxide layer which exposes the contact without substantially etching the patterned silicon nitride layer; and (2) a fluorocarbon polymer residue layer formed upon at least one of the etched silicon oxide layer and the patterned silicon nitride layer. Finally, there is stripped from the substrate the fluorocarbon polymer residue layer through a second reactive ion etch (RIE) method employing a second etchant gas composition comprising carbon tetrafluoride and oxygen. The method may also be employed in general for etching silicon oxide layers in the presence of silicon nitride layers. Similarly, the method may also in general be employed in removing fluorocarbon polymer residue layers from integrated circuit layers including but not limited to silicon oxide layers and silicon nitride layers.
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Jeng Erik S.
Ko Jun-Cheng
Ackerman Stephen B.
Breneman R. Bruce
Goudreau George
Saile George O.
Szecsy Alek P.
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