Triple metal line 1T/1C ferroelectric memory device and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S253000, C438S396000, C438S003000

Reexamination Certificate

active

06929997

ABSTRACT:
Disclosed is a triple metal line 1T/1C ferroelectric memory device and a method to make the same. A ferroelectric capacitor is connected to the transistor through a buried contact plug. An oxidation barrier layer lies between the contact plug and the lower electrode of the capacitor. A diffusion barrier layer covers the ferroelectric capacitor to prevent diffusion of material into or out of capacitor. As a result of forming the oxidation barrier layer, the contact plug is not exposed to the ambient oxygen atmosphere thereby providing a reliable ohmic contact between the contact plug and the lower electrode. Also, the memory device provides a triple interconnection structure made of metal, which improves device operation characteristics.

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