Trench free SRAM cell structure

Details Trench free SRAM cell structure Trench free SRAM cell structure

1996-06-13

1998-03-10

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 257903, 257290, G11C 1100

Patent

active

057269327

ABSTRACT:
An SRAM transistor cell on a doped semiconductor substrate comprises a first pass transistor and a second pass transistor, a first driver transistor and a second driver transistor and a saturated mode transistor. The device includes a first and second load resistor, first second and third nodes, a bit lines and interconnection lines. The first driver transistor drain region is connects to the first node. The control gate electrode cross connects via the first interconnection line to the second node. The second driver transistor drain region connects to the third node and the control gate electrode cross connects via the second interconnection line to the first node. The control gate electrodes of the pass transistors connect to a single input line. The drain region of the first pass transistor connects to the first node. The drain region of the second pass transistor connects to the second node. The source region of the first pass transistor connect to the bit line bar. The source region of the second pass transistor is connects to the bit line. The drain region and control gate electrode of the saturated mode transistor connect to the second node and the source region of the saturated mode transistor connects to the third node.

REFERENCES:
patent: 4933899 (1990-06-01), Gibbs
patent: 5243555 (1993-09-01), Youn et al.
patent: 5301146 (1994-04-01), Hama
patent: 5570312 (1996-10-01), Fu
S. Wolf, "Silicon Processing in the VLSI Era--vol. 2" Lattice Press, Sunset Beach, CA, 1990, pp. 160-162.

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