Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-11-20
2000-11-21
Mulpuri, Savitri
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438238, 438396, 438587, 438621, 438627, 438648, 438649, 438653, 438655, 438656, 257295, H01L 218242, H01L 213205, H01L 214763, H01L 2144
Patent
active
061502146
ABSTRACT:
A method of fabricating a DRAM integrated circuit structure (30) and the structure so formed, in which a common interconnect material (42, 48) is used as a first level interconnection layer in both an array portion (30a) and periphery portion (30p) is disclosed. The interconnect material (42, 48) consists essentially of titanium nitride, and is formed by direct reaction of titanium metal (40) in a nitrogen ambient. Titanium silicide (44) is formed at each contact location (CT, BLC) as a result of the direct react process. Storage capacitor plates (16, 18) and the capacitor dielectric (17) are formed over the interconnect material (42, 48), due to the thermal stability of the material. Alternative processes of forming the interconnect material (42, 48) are disclosed, to improve step coverage.
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Brady III Wade James
Mulpuri Savitri
Nguyen Ha Tran
Telecky Jr. Frederick J.
Texas Instruments Incorporated
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