Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-06-21
1998-08-11
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438244, 438245, H01L 218242
Patent
active
057926859
ABSTRACT:
Method for forming three-dimensional device structures comprising a second device formed over a first device is disclosed. A layer having a single crystalline top surface is formed above the first device to provide the base for forming the active area of the second device.
REFERENCES:
patent: 4988637 (1991-01-01), Dhong et al.
patent: 5302541 (1994-04-01), Akazawa
patent: 5627092 (1997-05-01), Alsmeier et al.
Hammerl Erwin
Ho Herbert L.
Mandelman Jack A.
Poschenrieder Bernhard
Short Alvin P.
Chin Dexter K.
International Business Machines - Corporation
Siemens Aktiengesellschaft
Tsai Jey
LandOfFree
Three-dimensional device layout having a trench capacitor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Three-dimensional device layout having a trench capacitor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Three-dimensional device layout having a trench capacitor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-388515