Thin stacked package

Details Thin stacked package Thin stacked package

2005-02-01

2005-02-01

Fahmy, Wael (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Chip mounted on chip

C257S686000, C257S775000

Reexamination Certificate

active

06849949

ABSTRACT:
A stacked package formed by stacking semiconductor device packages and a method of manufacturing a stacked semiconductor package. Each package includes leads and connection terminals. A semiconductor chip is electrically connected to the connection terminals. A package body has the same thickness as that of the lead so as to expose the upper and the lower surfaces of the leads at a surface of the package body. Each of the packages is stacked on another package by electrically connecting the exposed surfaces of the leads. The manufacturing method includes preparing lead frames, including a plurality of leads, supporting a semiconductor chip in a chip receiving cavity between the leads, connecting the semiconductor chip to the connection terminals of the leads, forming a package body of a thickness such that a portion of surface of the leads are exposed, separating packages from the lead frame, and forming a stacked package by stacking a plurality of the packages.

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patent: 1998-082949 (1998-12-01), None

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