Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
1999-01-29
2003-07-08
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
06591389
ABSTRACT:
FIELD OF THE INVENTION
This invention generally pertains to testing, maintenance, and repair of circuit packs. More particularly, this invention pertains to circuit pack self-test.
BACKGROUND OF THE INVENTION
In the large-scale production of modern electronic equipment, component inspection is necessary. In recent years, testing of integrated circuit devices has become essential. In quality control protocol, there has been a decrease in sample testing of circuit packs where a sample of circuit packs was randomly selected from a lot and is tested. Now, there is an increased reliance on testing all the circuit packs in all the lots. The practical reason for this is that some lots of components may contain as many as 5% rejects. Merely sampling a lot of this character will not extract all bad components. Hence bad components will continue through production to be integrated into a larger system and/or go into the field and presumably fail, resulting in substantial expense to fix or replace.
Experience has demonstrated that finding a bad component on a circuit pack at a board test is much less expensive than finding it in a system test after the circuit pack has been integrated into a larger system. In fact, if the bad component on a circuit pack is not located until the equipment reaches the field, it typically will cost about 1,000 times as much to find and replace it than if it had been detected and replaced during component inspection.
One procedure heretofore practiced in testing circuit packs is to input a series of test programs to the circuit pack and compare the results obtained to an expected result. This procedure includes the use of a computer controlled test system adapted to test various circuit packs. (The test system includes an interface to the circuit pack plus appropriate software to input test patterns and read results).
The “software” associated with a test system comprises those expedients by which the test system is explicitly told what to do through a step-by-step sequence of individual instructions which together constitute a program to perform some specific function or to yield a solution to a specific problem. An “instruction” is a group of bits that defines a particular computer operation. Thus, an instruction may direct a test system to move data, to do arithmetic and logic operations, to control input/output devices, or to make a decision as to which instruction is to be executed next.
The central processing unit (CPU) is that component of the test system which controls the interpretation and execution of instructions. In general, a CPU contains the following elements: “control”, which includes control logic and instructions for decoding and executing the program stored in “memory”; “registers” which provide control with temporary storage for bits, bytes or words, an arithmetic and logic unit that performs arithmetic and logic operations under supervision of control; and an input/output port providing access to peripheral devices such as a keyboard and a display terminal.
The memory system is that component of the test system which holds data and instruction codes, each instruction or datum being assigned a unique address that is used by the CPU when fetching or storing the information. The read-only memory or ROM is a memory adapted to store information permanently, such as a math function, a micro-program, or a testing program. A memory that can be programmed by the user, but only once, is known as a programmable ROM or PROM; hence when a PROM is programmed, it then functions as a ROM.
The term read/write memory signifies memory that is capable of storing information (writing) and of retrieving the stored information (reading) at a similar rate. A typical random-access memory (RAM) is a read-write memory adapted to store information in such a way that each bit of information can be retrieved within the same amount of time as any other bit. RAM is volatile in nature and data stored in RAM is erased upon a power-failure, power reset or power malfunction.
Non-volatile memory or NVM is permanent in nature. The data stored in NVM is not erased upon a power-failure or power-reset.
The term “firmware” denotes a computer program or instruction used so often that it is stored in a read-only memory instead of being included in software. A microprogram (a special purpose program initiated by a single instruction in the system's main program) is an example of firmware, being somewhere between hardware and software in performance.
The use of a test system for testing integrated circuit devices and circuit packs is common. In practice, the test program may be written in an English-like symbolic language. The programmer expresses in this language the voltages, the currents, the times, the type of test to be performed, the truth tables to be used for functional tests, the test limits and all other instructions pertinent to the tests. These test programs are custom designed to test specific components of circuit packs. After a program has been prepared, circuit packs may be tested either at the manual test station by an automatic handler, or by whatever other handling means are available to the customer.
Conventional test systems effectively test circuit packs by executing various test programs. At the conclusion of each test program, the resulting data is compared to the expected data. If they match, the test is declared a success, and under the control of software, the test system then proceeds to the next test program. If a match is not obtained for any one test, then the circuit pack is defective and should be replaced.
After a circuit pack is deployed in the field, it is useful to occasionally self-test the system to detect failures, and a historical record of test results (resulting data from the test programs) is stored in a non-volatile memory. Often times problems are intermittent in nature and the historical record is used to troubleshoot a malfunctioning circuit pack. However, recording of all test results in non-volatile memory is impractical since recording every pass or failure would be too voluminous, and also because most non-volatile memories have a limited number of write-cycles which can be performed before they can no longer retain the data written to them.
Also, sometimes a component on a circuit pack under test contains a fault that causes a test program to halt or hang. In such a case, the test program doesn't make it to a point where test results may be recorded and no record of the failure nor any current test results will be stored. Typically, an autonomous timer, also known as a watchdog timer, resets the test program sequence and the process of test program is repeated. In the next iteration, the test program may complete successfully or may fail in the same way or another way.
Therefore, there exists a need for a test system which not only tests the various components of a circuit pack, but also keeps a record of the current test results and failures that provides information about the location of a defect even when a test program cannot run to completion. It is further desired that the test system keep a historical record of the test program results immediately pointing to the intermittently failing or failed components and the failed step of the test program.
SUMMARY OF THE INVENTION
A circuit pack testing method is disclosed having an on-board testing system that is capable of providing data as to the source/location of a fault on the circuit pack even when the fault is such that the test series cannot run to completion. Specifically, two registers are provided that are dedicated to storing values corresponding to start and end, respectively, of test portions of an overall test suite (a plurality of test portions/programs) for the circuit pack. Each individual test portion is commenced by incrementing the value in the start register. As each individual test is completed, the value in the end register is incremented. Thus, if the full test suite runs to completion the start and end registers will contain the same value. Howe
Daudelin Douglas S.
McNerney Frank J.
Wells Richard P.
De'cady Albert
Lamarre Guy
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