Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
1999-09-23
2003-07-29
Decady, Albert (Department: 2784)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C702S124000
Reexamination Certificate
active
06601203
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a test program generation system and a test program generation method for semiconductor test apparatus, i.e., a test program generation system and a test program generation method for LSI tester.
Since reliability is required for semiconductor devices used in various use purposes, completed semiconductor devices are tested using the semiconductor test apparatus (LSI tester). In this case, in order to carry out such a test, it is necessary to generate test programs executed with respect to the LSI testers for a plurality of different kinds of semiconductor devices, i.e., different kinds of LSI testers.
FIG. 6
is a block diagram showing the configuration of a conventional test program generation system for a semiconductor test apparatus, and a conventional test program generation method for a semiconductor test apparatus which is carried out by this test program generation system.
The conventional test program generation system for semiconductor test apparatus shown in
FIG. 6
comprises memory
60
adapted so that a group of parameter files in which a plurality of parameter files used for test program generation are included are stored therein, and program translator
61
for carrying out compiling operation and linking operation of data which have been read out from respective parameter files of the group of parameter files to thereby generate test programs
62
of binary files which are executable program. In the group of parameter files stored in the memory
60
, there are included test flow file
601
in which measurement items and measurement orders are described, template files
602
in which measurement sequences are described, waveform files
603
in which waveform modes and timing values of signal waveform inputted and outputted with respect to LSI to be measured (DUT), level files
604
in which voltages of signals inputted and outputted with respect to the LSI to be measured are described, pin file
605
in which connection relationship between contact elements of LSI to be measured and contact elements of LSI tester is described, DC measurement condition files
606
in which measurement conditions of DC measurement are described, variable files
607
in which variables and operational expressions are described, pattern list files
608
in which information of execution start address and stop address of test pattern are described, and instance files
609
in which linkages relationship between templates and respective parameters are described.
At the translator
61
, there are provided compile means
611
for compiling data stored at respective parameter files
601
to
609
, and link means
612
for generating, from compiled data, test program
62
of binary file which is executable program.
The conventional test program generation system for semiconductor test apparatus shown in
FIG. 6
is operative to read out respective parameter files
601
to
609
from the memory
60
to compile data stored in the respective parameter files
601
to
609
by the compile means
611
to link the compiled data by the link means
612
to generate test program
62
of binary files which is executable program.
However, in the conventional test program generation system for a semiconductor test apparatus as described above, data stored in respective parameter files
601
to
609
are described by dedicated (specific) test program languages for a plurality of different types of LSI testers. For this reason, there was the problem that a test program dedicated to a specific type of LSI tester can only be generated from specific kinds of respective parameter files
601
to
609
. Accordingly, in order to prepare test programs for different types of LSI testers, an operator must prepare such test programs after the operator learns test program languages inherent in respective LSI testers. As a result, much time and labor are required.
In addition, there was also the problem that, as template file
602
of the group of parameter files, there are prepared template files in which sample models of measurement sequences are described in advance by LSI tester maker, but since the configuration is complicated, operator as user cannot easily prepare or modify such file.
SUMMARY OF THE INVENTION
A primary object of this invention is to provide a test program generation system for semiconductor test apparatus capable of preparing test programs corresponding to respective kinds of LSI testers, and capable of easily carrying out preparation and modification of template files in which measurement sequences prepared for every type of LSI testers are described.
A secondary object of this invention is to provide a test program generation method for semiconductor test apparatus capable of quickly generating test programs corresponding to respective kinds of LSI testers.
According to a first aspect of the present invention, there is provided a test program generation system for semiconductor test apparatus comprising:
memory adapted so that there are stored library in which information common to respective kinds of LSI testers are registered, and device information file in which inherent device information are registered every kinds of LSIs; and
library extraction/test element data generator for reading out data necessary for generating test programs of the respective kinds of the LSI testers from the library and the device information file of the memory to convert those data into data of common language independent of inherent various test program languages every the kinds of the LSI testers to thereby generate test element data used for generation of test programs of the respective kinds of the LSI testers.
According to a second aspect of the present invention, there is provided a test program generation method for semiconductor test apparatus, comprising:
a first step of converting data necessary for generation of test programs of respective kinds of LSI testers of data of library in which information common to the respective kinds of the LSI testers are registered and data of device information file in which inherent device information are registered every kinds of the LSIs into data of common language independent of the inherent various kinds of test program languages every the kinds of the LSI testers to thereby generate test element data used for generation of test programs of the respective kinds of the LSI testers; and
a second step of converting the test element data to thereby prepare test programs correspondingly to every kind of the LSI testers by ASCII format file.
In test program generation system and test program generation method for semiconductor test apparatus according to this invention, such an approach is employed to convert data necessary for generation of test programs of various kinds of LSI testers of data of library in which information common to respective kinds of LSI testers are registered and data of device information file in which inherent (specific) device information are registered for every kind of LSIs into data of common language independent of inherent various test program languages for every kind of LSI testers, thus to generate test element data (intermediate data) used for generation of test programs of various kinds of LSI testers. Accordingly, it is possible to commonly use test element data for the purpose of test program generation of respective kinds of LSI testers.
As a result, an operator only learns test element data constituted by common language independent of inherent test program languages every kinds of LSI testers, thus making it possible to prepare test programs of respective kinds of LSI testers. Namely, there is no necessity of learning inherent test program languages for every kind of LSI testers. Thus, improvement in efficiency of test program preparation of various kinds of LSI testers can be made.
Since conversion of data for generating test element data is carried out in the state classified into a plurality of information files in which necessary test element data is included commonly t
Asano Yoshihiro
Kodashiro Yoshiaki
Komuro Koji
Okabe Kinji
De'cady Albert
Foley & Lardner
Kabushiki Kaisha Toshiba
Lamarre Guy
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