Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-03-08
2005-03-08
Torres, Joseph D. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S743000
Reexamination Certificate
active
06865707
ABSTRACT:
Test data generator for generating test data patterns for the testing of a circuit having a frequency multiplication circuit, which increases a low clock frequency of an input clock signal received by a test unit with a specific clock frequency multiplication factor. Also provided is a plurality of data registers for storing test data words read from the data registers, and multiplexer that switches through a test data word read from a data register with the high clock frequency of the output clock signal to a data bus in a way dependent on a register selection control datum of a multi-position register selection control data vector.
REFERENCES:
patent: 5390192 (1995-02-01), Fujieda
patent: 5640509 (1997-06-01), Balmer et al.
patent: 6006349 (1999-12-01), Fujisaki
patent: 6571365 (2003-05-01), Rhodes et al.
Ernst Wolfgang
Krause Gunnar
Kuhn Justus
Luepke Jens
Mueller Jochen
Greenblum & Bernstein P.L.C.
Infineon - Technologies AG
Torres Joseph D.
LandOfFree
Test data generator does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Test data generator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Test data generator will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3456835