Test clock generation for higher-speed testing of a...

Details Test clock generation for higher-speed testing of a... Test clock generation for higher-speed testing of a...

2007-12-04

2007-12-04

Ton, David (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S731000, C714S744000

Reexamination Certificate

active

11089994

ABSTRACT:
Embodiments for generating a higher frequency test clock signal for a semiconductor device are disclosed. In an example embodiment, a clock generator may be coupled to a clock input. A test clock generator may receive a clock signal generated by the clock generator, and the test clock generator may output a higher frequency test clock signal derived at least in part from the clock signal generated by the clock generator. The test clock generator may output the higher frequency test clock signal for a configurable number of clock periods.

REFERENCES:
patent: 5453993 (1995-09-01), Kitaguchi et al.
patent: 5805611 (1998-09-01), McClure
patent: 6489819 (2002-12-01), Kono et al.
patent: 6817006 (2004-11-01), Wells et al.
patent: 6891395 (2005-05-01), Wells et al.
patent: 6904375 (2005-06-01), Sabih et al.

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