Test circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

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Details

G01R 3128

Patent

active

060922273

ABSTRACT:
A test circuit includes a writing unit that outputs m-bit data captured upon receipt of a clock signal, branches the m-bit data n identical m-bit data signals, and stores the n m-bit data signals in a memory device. A function determining unit reads the n m-bit data signals from the memory, compares one of the n m-bit data signals to an m-bit expected value, and determines coincidence or non-coincidence between the n m-bit data signal and an expected value.

REFERENCES:
patent: 4369511 (1983-01-01), Kimura et al.
patent: 4450560 (1984-05-01), Conner
patent: 4736373 (1988-04-01), Schmidt
patent: 4991139 (1991-02-01), Takahashi et al.
patent: 5062109 (1991-10-01), Ohshima et al.
patent: 5412662 (1995-05-01), Honma et al.
patent: 5909448 (1999-06-01), Takahashi

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