Test board for testing IC devices operating in merged data outpu

Details Test board for testing IC devices operating in merged data outpu Test board for testing IC devices operating in merged data outpu

1997-11-10

2000-04-25

De Cady, Albert

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

G01R 3128

Patent

active

060556579

ABSTRACT:
During burn-in testing of IC devices, the devices operate in either merged data output mode for shortening the test time or in standard mode for detecting defective data output terminals of the devices. A single test board is provided to test the devices regardless of the operational mode. The test board wiring patterns electrically connect a predetermined number of merged data output terminals of the device to the I/O pins of the test board when the devices are in the merged data output mode. When the devices operate in the standard mode, the wiring patterns electrically connect all the output terminals of the devices to the I/O pins.

REFERENCES:
patent: 5568492 (1996-10-01), Flint et al.
patent: 5673270 (1997-09-01), Tsujimoto
patent: 5717652 (1998-02-01), Ooishi
patent: 5754559 (1998-05-01), Nevill
patent: 5794175 (1998-08-01), Conner

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