Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With stress relief
Patent
1997-12-18
1999-10-26
Fahmy, Wael M.
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With stress relief
257670, 257674, 257620, 257775, H01L 213205, H01L 27108
Patent
active
059733870
ABSTRACT:
Leading and trailing metal features in a dense array of conductive lines bordering an open field are formed with side surfaces that gradually taper in the direction of the open field toward an underlying substrate. Each side surface bordering the open field is formed with a sufficient slope to reduce cracking of the subsequently deposited dielectric gap fill layer at high stress areas bordering the open field.
REFERENCES:
IBM (Method for metallization patterning, IBM Technical Disclosure Bulletin, IBM Corp. p. 451, vol. 37 No. 05), May 1994.
Chen Robert C.
Shields Jeffrey A.
Tran Khanh
Advanced Micro Devices , Inc.
Duong Hung Van
Fahmy Wael M.
LandOfFree
Tapered isolated metal profile to reduce dielectric layer cracki does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Tapered isolated metal profile to reduce dielectric layer cracki, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Tapered isolated metal profile to reduce dielectric layer cracki will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-767887