Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2007-10-02
2007-10-02
Perveen, Rehana (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S375000, C713S401000, C713S500000, C713S501000, C713S600000
Reexamination Certificate
active
10093297
ABSTRACT:
A method for overload detection according to one embodiment of the invention includes a control process and a data process. In response to a timing signal, the control process sets a state of a timing indicator. Upon execution of a time-constrained operation, the data process checks the state of the timing indicator. In other embodiments, subsequent to an overload detection, an auxiliary data process is configured to execute in a mode that consumes fewer processing cycles.
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Brown Charles D.
Brown Michael J.
Perveen Rehana
QUALCOMM Incorporated
Rouse Thomas
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