System and method for suppressing oxide formation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S381000, C438S954000, C438S680000, C257SE21051, C257SE21057, C257SE21170

Reexamination Certificate

active

11025040

ABSTRACT:
A system and method for suppressing sub-oxide formation during the manufacturing of semiconductor devices (such as MOSFET transistor) with high-k gate dielectric is disclosed. In one example, the MOSFET transistor includes a gate structure including a high-k gate dielectric and a gate electrode. In this example, the gate structure is covered with a nitride layer that is used to prevent oxygen from entering the structure during processing, yet is sufficiently thin to be effectively transparent to the processing.

REFERENCES:
patent: 6051865 (2000-04-01), Gardner et al.
patent: 6476454 (2002-11-01), Suguro
patent: 6864145 (2005-03-01), Hareland et al.
patent: 7002224 (2006-02-01), Li

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