Synchronous semiconductor memory device having on-die...

Details Synchronous semiconductor memory device having on-die... Synchronous semiconductor memory device having on-die...

2007-05-23

2008-09-16

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S194000, C365S233100, C326S030000

Reexamination Certificate

active

07426145

ABSTRACT:
A synchronous semiconductor memory device having an on-die termination (ODT) circuit, and an ODT method, satisfy ODT DC and AC parameter specifications and perform an adaptive impedance matching through an external or internal control, by executing an ODT operation synchronized to an external clock. The synchronous semiconductor memory device having a data output circuit for performing a data output operation synchronously to the external clock includes the ODT circuit for generating ODT up and down signals having the same timing as data output up and down signals for the data output operation, to perform the ODT operation.

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patent: 6157206 (2000-12-01), Taylor et al.
patent: 6411122 (2002-06-01), Mughal et al.
patent: 6414512 (2002-07-01), Moyer
patent: 6571376 (2003-05-01), Levin et al.
patent: 6806728 (2004-10-01), Nguyen et al.
patent: 6832177 (2004-12-01), Khandekar et al.

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