Strain enhanced ultra shallow junction formation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S308000, C438S778000, C257SE21409

Reexamination Certificate

active

10889915

ABSTRACT:
Provided is a method of manufacturing a microelectronic device. In one example where the device includes a semiconductor substrate with a gate feature and a shallow junction, the method includes introducing dopants to the substrate to form a source region and a drain region. A strained layer may be formed over the substrate after introducing the dopants, and an annealing process may be performed after forming the strained layer.

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Heemyong Park et al., ‘The Effects of Strain on Dopant Diffusion in Silicon’, 1993, pp. 303-306, 0-7803-1450-6.
Samir Chaudhry et al., ‘The Stress Assisted Evolution of Point and Extended Defects in Silicon’, Aug. 1, 1997, pp. 1138-1146, American Institute of Physics, 0021-8979/97/82(3)/1138/9.
Babak Sadigh et al, ‘Large Enhancement of Boron Solubility in Silicon Due to Biaxial Stress’, Jun. 24, 2002, pp. 4738-4740, vol. 80, No. 25, American Institute of Physics, 0003-6951/2002/80(25)4738/3.

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