Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-07-03
2007-07-03
Lamarre, Guy (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S724000, C714S752000
Reexamination Certificate
active
10317605
ABSTRACT:
In one embodiment, a method is provided. In the method of this embodiment, a stimulus signal set may be generated and supplied, as input, to first circuitry. Each respective stimulus signal in the stimulus signal set may be generated based at least in part upon a respective non-null subset of an input signal set. No two respective stimulus signals in the stimulus signal set may be generated based upon the same respective non-null subset of the input signal set. The stimulus signal set may include a respective number of stimulus signals that is greater than a respective number of input signals in the input signal set. Of course, many modifications, variations, and alternatives are possible without departing from the method of this embodiment.
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Kim Kee Sup
Mitra Subhasish
Gandhi Dipakkumar
Intel Corporation
Lamarre Guy
Nordstrom Erick R.
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