Stack package

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame

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Details

257666, 257787, H01L 23495

Patent

active

06075284&

ABSTRACT:
Disclosed is a stack package. In the stack package, at least two semiconductor chips 40 are disposed up and down. Inner leads 31 of lead frames 30 are attached at a bonding pad-disposed face of the semiconductor chip 40. The inner leads 31 are electrically connected to the bonding pads of the semiconductor chips 40 with metal wires 50. Protruding portions 33,34 are formed at the inner leads 31 toward downside and upside. To expose the respective protruding portions 33,34 and outer leads 32 formed at the lowermost lead frame 30, the respective semiconductor chips 40 are molded with an epoxy compound 60. The respective lead frames 30 are electrically connected by contacting the upwardly or downwardly protruding portions 34, 33 from the respective lead frames.

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patent: 5818107 (1998-10-01), Pierson et al.
patent: 5821625 (1998-10-01), Yoshida et al.
patent: 5898212 (1999-04-01), Kim

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