Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-07-29
2000-07-11
Nelms, David
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438264, H01L 21336
Patent
active
060872209
ABSTRACT:
A method of forming a floating gate memory array is provided that uses a two step etch process to prevent the formation of unwanted trenches 66 into the semiconductor substrate 26. The process may be accomplished by a first etch which is substantially not selective between silicon and dielectric materials. A second etch process is then used which is highly selective to dielectric materials.
REFERENCES:
patent: 5915177 (1999-05-01), Tseng
Chen Men-Chee
Kaya Cetin
Laaksonen Reima T.
Mehrad Freidoon
Rogers Daty Michael
Brady III W. James
Garner Jqacqueline J.
Hoang Quoc
Nelms David
Telecky Jr. Frederick J.
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