SRAM device having negative voltage generator for performing sta

Details SRAM device having negative voltage generator for performing sta SRAM device having negative voltage generator for performing sta

1998-05-08

1999-08-31

Dinh, Son T.

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 365226, 3652335, G11C 1100

Patent

active

059462256

ABSTRACT:
A SRAM device according to the present invention performs a stable data latch operation. The present invention provides a negative voltage generator which is coupled to the drive transistors in the SRAM device for providing negative voltage for the drive transistors during a read cycle of the SRAM device when a word line of the SRAM device is activated. The negative voltage generator includes an output terminal coupled to access transistors, a current path for discharging the output terminal up to a ground voltage level in response to control signals, and a pump for pumping the output terminal to make the output terminal be in a negative voltage level.

REFERENCES:
patent: 4984207 (1991-01-01), Tateno et al.
patent: 5406513 (1995-04-01), Canaris et al.
patent: 5528536 (1996-06-01), Baldi et al.
patent: 5696728 (1997-12-01), Yu et al.
patent: 5696731 (1997-12-01), Miyamoto
patent: 5715191 (1998-02-01), Yamauchi et al.
patent: 5757702 (1998-05-01), Iwata et al.

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