Chemistry: electrical and wave energy – Processes and products – Coating – forming or etching by sputtering
Reexamination Certificate
2002-02-05
2004-06-01
VerSteeg, Steven (Department: 1753)
Chemistry: electrical and wave energy
Processes and products
Coating, forming or etching by sputtering
C204S298150, C204S298160, C427S585000, C335S296000, C335S306000
Reexamination Certificate
active
06743340
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to sputtering of materials. In particular, the invention relates to the auxiliary magnets used in the sputtering of magnetic materials.
2. Background Art
Magnetic random access magnetic memory (MRAM), also called magnetoelectronic memory, is receiving increased interest and is expected to shortly enter commercial manufacture. MRAM as currently conceived involves the integration of magnetic materials into semiconductor integrated circuits to produce chips having millions of memory cells on which information can be written and read. When it is fabricated on a silicon wafer, silicon support circuitry can be included on the same wafer. Importantly, the MRAM is non-volatile memory. In a write operation, the magnetic material is poled into one of two magnetic states. In a read operation, the magnetic state of the poled material is determined. The magnetic state of the memory is maintained in the quiescent period between the write and read operations with no power being applied to the memory cell.
Many forms of MRAM have been contemplated, some of which are reviewed by Johnson in “Magnetoelectronic memories last and last . . . ,”
IEEE Spectrum
, vol. 37, no. 2, February 2000, pp. 33-40. One form includes a magnetic tunneling junction (MTJ), which is explained in more detail by Parkin et al. in “Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory,”
Journal of Applied Physics
, vol. 85, no. 8, 15 Apr. 1999, pp. 5828-5833.
FIG. 1
is a schematic orthographic view of one MTJ cell
10
in a large two-dimensional array. The many cells
10
are formed by fairly standard techniques well developed for the most part in the semiconductor integrated circuit industry. Furthermore, when the magnetic cell is fabricated on a silicon wafer, silicon support circuitry can be integrated on the same wafer as the magnetic memory.
The magnetic storage cell
10
is centered on a junction structure
12
including a fixed magnetic layer
14
and a free magnetic layer
16
separated by a very thin non-magnetic tunneling barrier
18
. Both magnetic layer
14
,
16
are relatively thin, typically on the order of 1 to 20 nm thick. In the most prevalent MRAM design, the magnetic layers
14
,
18
are electrically conductive, and the tunneling barrier
18
is a very thin electrically insulating layer, typically on the order of less than 2 nm or even 1 nm. The extreme thinness allows quantum mechanical electron tunneling through the otherwise dielectric barrier
18
. An alternative structure replaces the dielectric barrier with a metal barrier through which spin can tunnel, as described by Tehrani et al. in “High density submicron magnetoresistive random access memory,”
Journal of Applied Physics
, vol. 85, no. 8, 15 Apr. 1999, pp. 5822-5827. Somewhat similar magnetic stacks may be used to form spin valves or spin transistors, as Zorbette describes in “The quest for the spin transistor,”
IEEE Spectrum
, vol. 38, no. 12, December 2001, pp. 30-35.
The two magnetic layers
14
,
16
of the MTJ cell
10
are distinguished in that the fixed magnetic layer
14
has a predetermined magnetization, for example, in one of the two horizontal directions of the illustrations, while the free magnetic layer
16
can be semi-permanently poled and repoled into either of the two horizontal directions. Which horizontal direction determines the state of the memory cell
10
. The magnetic layers
14
,
16
are typical composed of transition metals and their alloys, for example, NiFe, CoFe, Co, or Ru or a bilayer or sandwich structure of such materials. The iron alloys are typically rich in the transition metal, for example, Ni
80
Fe
10
or Co
90
Fe
10
. The barrier
18
may be composed of oxidized aluminum. The distinction between fixed and free magnetic layers may be determined by the fixed layer being grown on an anti-ferromagnetic layer, also called the exchange-bias layer which prevents the adjacent fixed magnetic layer from changing state. The exchange-bias layer is typically a manganese alloy, for example, Pt
50
Mn
50
. Other anti-ferromagnetic compositions include MnFe, MnIr, MnRh, NiO, ThCo, and iridium alloys. The exchange-bias layer allows the two magnetic layers
14
,
16
to have the same composition. Other buffer, transition, and capping layers are typically included in the stack structure.
In the illustrated MTJ cell
10
, a metallic bit line
20
is electrically connected to the free magnetic layer
14
of the storage structure
12
as well as to many other cells
10
in the plane of the illustration. The fixed magnetic layer
14
is electrically connected to a conductive cross connector
22
electrically selected by an isolation transistor
24
. In this embodiment, it is assumed that the isolation transistor
24
is individually selected for each memory cell
10
. A digit line
26
underlies the storage structure
12
and runs orthogonally to the bit line
18
in the two-dimensional memory array.
The operation of the memory cell
10
relies upon the effect that the impedance of the storage
12
when the two magnetic layers
12
,
16
are aligned to be parallel, as illustrated in the schematic illustration of
FIG. 2
, is significantly less than the impedance when the two magnetic layer
14
,
16
are aligned to be anti-parallel, as illustrated in the schematic illustration of FIG.
3
. The impedance depends upon quantum mechanical spin effects between the two magnetic layers
14
,
16
and may be measured as either voltage or current by measuring circuitry gated by the isolation transistor
24
, usually in comparison to a reference cell. The measuring electrical path proceeds from the bit line
20
through the storage structure
12
, cross connect
22
and isolation transistor
24
.
It is possible to initially pole the fixed layer
14
(as well as the free layer
16
) with a large current pulse and thereafter in operation use lesser currents to switch only the free layer
16
. However, for a large dense memory, the one-time poling of the fixed layer
14
significantly complicates the chip design. It is much preferred that the magnetization direction of the fixed magnetic layer
14
be impressed during the growth of the fixed layer
14
and that in operation the fixed layer
14
remain permanently polarized. On the other hand, during operation the magnetization direction of the free magnetic layer
16
can be written and rewritten in selected directions according to orthogonal currents passed through the bit line
20
and the digit line
26
. Once the magnetic state is written into the storage cell
10
, it remains until rewritten. Whatever state is currently written in the storage cell
10
is read by measuring the impedance of the storage structure
12
. It is important that the magnetization direction impressed during growth of the fixed magnetic layer
14
be properly aligned with the bit and digit lines
20
,
26
. Any significant misalignment, for example, more than 5 or 10°, degrades the impedance differential between the two memory states.
The magnetic layers
14
,
16
are conveniently formed of a magnetic metal such as NiFe or CoFe by a sputtering process using a sputtering target of approximately the same composition. Sputtering has the advantage of a relatively high sputtering rate using relatively expensive source materials in a relatively simple sputter reactor. However, sputtering of the stated magnetic layers presents some difficulties. Usually magnetron sputtering is employed in which a magnetron is positioned in back of the target to create a magnetic field in front of the target to increase the plasma density and hence the sputtering rate. However, the magnetic characteristics of the target inhibits the effect of the magnetron.
A more difficult problem arises when it is desired to deposit the fixed magnetic layer
14
with its magnetization fixed in a predetermined direction determined by the bit and digit lines
20
,
26
. In the past, such selective magnetizati
Applied Materials Inc.
Guenzer, Esq. Charles S.
VerSteeg Steven
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