SONOS memory cell having high-K dielectric

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S317000, C257S321000, C257S324000, C257SE29129, C257SE29300, C257SE29304

Reexamination Certificate

active

07446369

ABSTRACT:
A semiconductor memory device may include an intergate dielectric layer of a high-K dielectric material interposed between a floating gate and a control gate. With this intergate high-K dielectric in place, the memory device may be erased using Fowler-Nordheim tunneling.

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Co-pending U.S. Appl. No. 11/008,233, filed Dec. 10, 2004; entitled: “Memory Cell Having Enhanced High-K Dielectric”, by Joong Jeon et al., 30 pages.
Co-pending U.S. Appl. No. 11/049,855, filed Feb. 4, 2005; entitled: “Non-Volatile Memory Device With Improved Erase Speed”, by Joong Jeon et al., 22 pages.
Co-pending U.S. Appl. No. 11/086,310, filed Mar. 23, 2005; entitled: “High K Stack For Non-Volatile Memory”, by Wei Zheng et al., 21 pages.
Co-pending U.S. Appl. No. 11/128,392, filed May 13, 2005; entitled: “SONOS Memory Cell Having a Graded High-K Dielectric”, by Takashi Whitney Orimoto et al., 31 pages.
International Search Report for PCT/US2006/028813 Mailed Dec. 6, 2006, 3 pages.

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