SONOS memory cell having a graded high-K dielectric

Details SONOS memory cell having a graded high-K dielectric SONOS memory cell having a graded high-K dielectric

2007-11-13

2007-11-13

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21584, C257SE29165

Reexamination Certificate

active

11128392

ABSTRACT:
A semiconductor memory device may include an intergate dielectric layer of high-K dielectric materials interposed between a charge storing layer and a control gate. The high-K materials may be deposited in such a manner that the materials are gradually graded with respect to one another.

REFERENCES:
patent: 5688724 (1997-11-01), Yoon et al.
patent: 5914895 (1999-06-01), Jenne
patent: 6090659 (2000-07-01), Laibowitz et al.
patent: 6163049 (2000-12-01), Bui
patent: 6215702 (2001-04-01), Derhacobian et al.
patent: 6407435 (2002-06-01), Ma et al.
patent: 6445030 (2002-09-01), Wu et al.
patent: 6559014 (2003-05-01), Jeon
patent: 6562491 (2003-05-01), Jeon
patent: 6617639 (2003-09-01), Wang et al.
patent: 6642573 (2003-11-01), Halliyal et al.
patent: 6744675 (2004-06-01), Zheng et al.
patent: 6750066 (2004-06-01), Cheung et al.
patent: 6753570 (2004-06-01), Tripsas et al.
patent: 6760270 (2004-07-01), Chindalore et al.
patent: 6768160 (2004-07-01), Li et al.
patent: 6797599 (2004-09-01), Visokay et al.
patent: 6894932 (2005-05-01), Melik-Martirosian et al.
patent: 7005695 (2006-02-01), Agarwal
patent: 7034356 (2006-04-01), Nomoto et al.
patent: 7038284 (2006-05-01), Haukka et al.
patent: 7091548 (2006-08-01), Jeong et al.
patent: 7138680 (2006-11-01), Li et al.
patent: 2002/0024092 (2002-02-01), Palm et al.
patent: 2002/0090808 (2002-07-01), Jeon et al.
patent: 2003/0062567 (2003-04-01), Zheng et al.
patent: 2003/0122204 (2003-07-01), Nomoto et al.
patent: 2004/0028952 (2004-02-01), Cartier et al.
patent: 2005/0006696 (2005-01-01), Noguchi et al.
patent: 2005/0036391 (2005-02-01), Tomile et al.
patent: 2006/0003529 (2006-01-01), Baker
patent: 2006/0160303 (2006-07-01), Ang et al.
patent: 29 46 864 (1980-06-01), None
Co-pending U.S. Appl. No. 11/008,233, filed Dec. 10, 2004; entitled: “Memory Cell Having Enhanced High-K Dielectric”, by Joong Jeon et al., 30 pages.
Co-pending U.S. Appl. No. 11/049,855, filed Feb. 4, 2005; entitled: “Non-Volatile Memory Device With Improved Erase Speed”, by Joong Jeon et al., 22 pages.
Co-pending U.S. Appl. No. 11/086,310, filed Mar. 23, 2005; entitled: “High K Stack For Non-Volatile Memory”, by Wei Zheng et al., 21 pages.
Co-pending U.S. Appl. No. 11/196,434, filed Aug. 4, 2005; entitled: “SONOS Memory Cell Having High-K Dielectric”, by Takashi Whitney Orimoto et al., 27 pages.

Affiliated with

Also associated with

Rating

SONOS memory cell having a graded high-K dielectric does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with SONOS memory cell having a graded high-K dielectric, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and SONOS memory cell having a graded high-K dielectric will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3864465