Single wafer thermal CVD processes for hemispherical grained...

Details Single wafer thermal CVD processes for hemispherical grained... Single wafer thermal CVD processes for hemispherical grained...

2008-03-11

2008-03-11

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S097000, C438S640000, C257SE21170, C257SE21412

Reexamination Certificate

active

07341907

ABSTRACT:
Methods for depositing hemispherical grained silicon layers and nanocrystalline grain-sized polysilicon layers are provided. The hemispherical grained silicon layers and nanocrystalline grain-sized polysilicon layers are deposited in single substrate chemical vapor deposition chambers. The hemispherical grained silicon layers and nanocrystalline grain-sized polysilicon layers may be used as electrode layers in semiconductor devices. In one aspect, a two step deposition process is provided to form a nanocrystalline grain-sized polysilicon layer with a reduced roughness.

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