Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Multiple layers
Reexamination Certificate
2001-07-05
2004-06-29
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Multiple layers
C438S764000, C438S778000
Reexamination Certificate
active
06756319
ABSTRACT:
CLAIM OF PRIORITY
This application claims priority to an application entitled “Method of Fabricating Silica Microstructures”, filed in the Korean Intellectual Property Office on Jul. 6, 2000 and assigned Serial No. 2000-38692, the contents of which are hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to integrated optical devices. More particularly, the present invention relates to a method of fabricating silica microstructures.
2. Description of the Related Art
Integrated optics technology has continuously been developed. The integrated optics is characterized by small size, low price, low power, and high speed as compared to assembly of individual optical parts. As integrated optical devices, a planar lightwave circuit (PLC) and a micro-electromechanical system (MEMS) are now attracting attention.
PLC refers to a device with a waveguide formed of silica being a fiber material on a silicon substrate. It is known that an existing fiber optic-type splitter is superior to a PLC splitter at a split ratio up to 1×4 but vice versa at a higher split ratio. The PLC realizes a compact and mass-produced circuit and provides excellent cost performance.
MEMS emerged from silicon processing technology, and primitive MEMS applications include valves, motors, pumps, gears, and the like that are formed two-dimensionally. Integration of micro devices through anisotropical etching of a semiconductor substrate was studied and three-dimensional fiber optic devices have been developed. However, there has been recently developed technology in this field regarding fabrication of three-dimensional thin film structures by etching a sacrificial thin film on a semiconductor substrate.
In order to fabricate silica microstructures such as PLC and MEMS devices, it is necessary to etch a silica layer to a specific depth. For example, integrated devices must be arranged perpendicularly to a silica light waveguide in fabricating a silica PLC in a hybrid integration scheme. To do so, the overcladding layer of the silica light waveguide must be removed from its core layer to a predetermined depth.
However, because the overcladding layer is formed on the core layer with a thickness deviation of 7 &mgr;m or greater, the thickness of the overcladding layer cannot be accurately determined. Therefore, it is very difficult to etch the overcladding layer to the predetermined depth.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a silica microstructures fabrication method for stopping etching at a desired position during a dry etch.
The foregoing and other objects can be achieved by providing a silica microstructure fabrication method. An etch stop layer is first partially deposited on an etching area of a first silica layer formed on a semiconductor substrate. A second silica layer is deposited on the surfaces of the etch stop layer and the first silica layer. A mask patterned according to the shape of the etching area is formed on the surface of the second silica layer. The second silica layer is removed from the etching area using the mask by dry etching, and the etch stop layer is removed by wet etching.
REFERENCES:
patent: 5284549 (1994-02-01), Barnes et al.
patent: 5330920 (1994-07-01), Soleimani et al.
patent: 6025234 (2000-02-01), Chou
patent: 6051510 (2000-04-01), Fulford et al.
patent: 6262455 (2001-07-01), Lutze et al.
patent: 6268287 (2001-07-01), Young et al.
patent: 6306706 (2001-10-01), Chan et al.
patent: 6340435 (2002-01-01), Bjorkman et al.
patent: 6376156 (2002-04-01), Cheng et al.
patent: 2002/0031711 (2002-03-01), Steinberg et al.
patent: 64-031586 (1989-02-01), None
patent: 04-313710 (1992-11-01), None
patent: 07-241690 (1995-09-01), None
patent: 07-283215 (1995-10-01), None
patent: 10-268526 (1998-10-01), None
patent: 11-095055 (1999-04-01), None
patent: 11-204414 (1999-07-01), None
Cha & Reiter LLC
Fourson George
Samsung Electronics Co,. Ltd.
Toledo Fernando L.
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