Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-01-16
2009-11-24
Lebentritt, Michael S (Department: 2829)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S283000, C438S285000, C438S300000, C438S301000, C257SE21632, C257SE21637, C257SE21639, C257SE21642, C257SE21703, C257SE27046, C257SE27112, C257SE29086
Reexamination Certificate
active
07622341
ABSTRACT:
A method for growing an epitaxial layer patterns a mask over a substrate. The mask protects first areas (N-type areas) of the substrate where N-type field effect transistors (NFETs) are to be formed and exposes second areas (P-type areas) of the substrate where P-type field effect transistors (PFETs) are to be formed. Using the mask, the method can then epitaxially grow the Silicon Germanium layer only on the P-type areas. The mask is then removed and shallow trench isolation (STI) trenches are patterned (using a different mask) in the N-type areas and in the P-type areas. This STI patterning process positions the STI trenches so as to remove edges of the epitaxial layer. The trenches are then filled with an isolation material. Finally, the NFETs are formed to have first metal gates and the PFETs are formed to have second metal gates that are different than the first metal gates. The first metal gates have a different work function than the second metal gates.
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Black Linda
Chudzik Michael P.
Schepis Dominic J.
Advanced Micro Device Inc.
Cai Yuanmin
Gibb I.P. Law Firm LLC
International Business Machines - Corporation
Lebentritt Michael S
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