Electrical computers and digital data processing systems: input/ – Input/output data processing – Concurrent input/output processing and data transfer
Reexamination Certificate
2011-01-11
2011-01-11
Hafiz, Tariq (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Concurrent input/output processing and data transfer
C710S022000, C710S023000, C710S029000, C710S033000, C710S036000, C710S037000
Reexamination Certificate
active
07870306
ABSTRACT:
A method and apparatus are described to provide shared switch and cache memory. The apparatus may comprise a message switch module, a cache controller module, and shared switch and cache memory to provide shared memory to the message switch module and to the cache controller module. The cache controller module may comprise pointer memory to store a plurality of pointers, each pointer pointing to a location in the shared switch and cache memory (e.g., point to a message header partition in the shared switch and cache memory). If there is a corresponding pointer, a memory read response may be sent to the requesting agent. If there is no corresponding pointer, a write data request may be sent to a corresponding destination agent and, in response to receiving the requested data, a pointer to the stored data in the pointer memory may be provided.
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“U.S. Appl. No. 11/469,462, Non Final Office Action Mailed Oct. 8, 2009”, 26 pgs.
Cisco Technology Inc.
Hafiz Tariq
Schwegman Lundberg & Woessner, P.A.
Vidwan Jasjit S
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