Sequencing of the recipe steps for the optimal low-k HDP-CVD pro

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438763, 438784, 427573, 427579, H01L 21316

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active

059373237

ABSTRACT:
A sequence of process steps forms a fluorinated silicon glass (FSG) layer on a substrate. This layer is much less likely to form a haze or bubbles in the layer, and is less likely to desorb water vapor during subsequent processing steps than other FSG layers. An undoped silicon glass (USG) liner protects the substrate from corrosive attack. The USG liner and FSG layers are deposited on a relatively hot wafer surface and can fill trenches on the substrate as narrow as 0.8 .mu.m with an aspect ratio of up to 4.5:1.

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