Semiconductor test system

Details Semiconductor test system Semiconductor test system

2008-05-28

2010-12-07

Ton, David (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S738000

Reexamination Certificate

active

07849375

ABSTRACT:
A semiconductor test system includes: pin electronics (“PE”) cards each being operable to: a) apply a test pattern to device under tests (“DUTs”) each connected to the PE cards; b) capture patterns outputted in response to the test pattern from the DUTs; c) compare the patterns with an expected value pattern; and d) determine whether or not the patterns correspond with the expected value pattern, and a fail control card being operable to: e) aggregate fail information about the DUTs inputted through the PE cards every the DUTs; and f) transfer the fail information to the PE cards.

REFERENCES:
patent: 5101153 (1992-03-01), Morong, III
patent: 7114108 (2006-09-01), Park et al.
patent: 7508191 (2009-03-01), Roberts
patent: 7679390 (2010-03-01), Matsumoto et al.
patent: 7692441 (2010-04-01), Matsumoto et al.
patent: 2003-167031 (2003-06-01), None
patent: 2003-196999 (2003-07-01), None
Korean Office Action issued Aug. 26, 2009.

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