Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device
Reexamination Certificate
2000-03-10
2002-04-02
Huff, Mark F. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Making electrical device
C430S314000, C430S316000, C430S317000, C430S318000, C430S319000, C438S253000, C438S396000
Reexamination Certificate
active
06365328
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates generally to semiconductor structures and manufacturing methods and more particularly to semiconductor memory devices.
As is known in the art, semiconductor memories have a wide range of applications. One type of such memory device is a random access memory (RAM). One type of such RAM includes a storage element electrically connected to a transistor, e.g. a Dynamic Random Access Memory, or DRAM). When the transistor is enabled during a write operation, data may be stored in the storage element while, during a subsequent read operation the data stored in the storage element may be read therefrom. The storage element may be, for example, a capacitor having a pair of plates, or electrodes separated by a dielectric. With such storage element, when a logic one is to be written into the storage element, the transistor is enabled to couple charge to the plates whereas when a logic zero is to be written into the storage element charge the transistor is enabled to removed from the plates. Another type of storage element is a ferroelectric device, a so-called Ferroelectric Random Access Memory (FRAM). Such device includes a ferroelectric material disposed between a pair of electrodes. Typically, when a logic one is to be written into this type of storage element the transistor is enabled to couple a voltage to the plates and thereby produce an electric field (which is a vector) through the ferroelectric material in a first direction (i.e., in a direction from say a first one of the plates, which is placed at a positive potential relative to the second one of the plates, to the second one of the plates). Even when the voltage is removed, the ferroelectric material “remembers” the direction of the electric field. On the other hand, when a logic zero is to be written into this type of storage element the transistor is enabled to produce an electric field through the ferroelectric material in a second direction opposite to the first direction (i.e., in a direction from say the second one of the plates, which is placed now at a positive potential relative to the first one of the plates, to the first one of the plates). The state of the bit is detected by, for example, sensing the “direction” of the electric filed stored by the ferroelectric material.
With both these, and other types of memory devices, is generally necessary to electrically connect one of the electrodes of the storage element to a region in a semiconductor substrate, for example to a doped region in the substrate providing a source/drain region of the transistor in the case of a MOSFET device. With many of these devices the storage element is formed over the substrate in a so-called stack arrangement.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method is provided for forming an electrode. The method includes forming a conductive plug through a first dielectric layer. The plug extends from an upper surface of the first dielectric layer to a contact region in a semiconductor substrate. A barrier contact is formed on an upper surface of the conductive plug. The electrode is formed on one portion of the upper surface of the barrier contact, another portion of the is upper surface of the barrier contact being uncovered by the electrode. A second dielectric layer is deposited over the first dielectric layer, over side portions and top portions of the formed electrode, and over the uncovered portion of barrier contact. A sacrificial material is formed on portions of the second dielectric layer disposed on: lower sides of the electrode; portions of the second dielectric layer disposed on the first dielectric layer; and, said exposed portions of the barrier contact while exposing portions of the second dielectric layer disposed on the top portions and upper side portions of the formed electrode. The exposed portions of the second dielectric layer are removed while leaving the portions of the second dielectric layer disposed on: lower sides of the electrode; portions of the second dielectric layer disposed on the first dielectric layer; and, portions of the second dielectric layer disposed on said exposed portions of the barrier contact.
In accordance with one embodiment of the invention, a method is provided for forming a storage element. The method includes forming a conductive plug through a first dielectric layer. The plug extends from an upper surface of the first dielectric layer to a contact region in a semiconductor substrate. A barrier contact is formed on an upper surface of the conductive plug. A first electrode for the storage element is formed on one portion of the upper surface of the barrier contact, another portion of the upper surface of the barrier contact being uncovered by the first electrode. A second dielectric layer is formed over the first dielectric layer, over side portions and top portions of the formed first electrode, and over the uncovered portion of barrier contact. A sacrificial material is formed on portions of the second dielectric layer disposed on: lower sides of the electrode; portions of the second dielectric layer disposed on the first dieletric layer; and, said exposed portions of the barrier contact while exposing portions of the second dielectric layer disposed on the top portions and upper side portions of the formed first electrode. The exposed portions of the second dielectric layer are removed while leaving the portions of the second dielectric layer disposed on: lower sides of the first electrode; portions of the second dielectric layer disposed on the first dielectric layer; and, portions of the second dielectric layer disposed on said exposed portions of the barrier contact. A material is deposited over exposed portions of the first electrode and over remaining portions of the second dielectric layer in an oxidizing environment. A second electrode is formed for the storage element over the formed material.
In one embodiment of the invention, the material is formed in an oxidizing environment to provide a capacitor storage element. The portion of the second dielectric layer on the barrier contact prevents oxidation of the barrier contact during the formation of the material in the oxidizing environment.
In accordance with one embodiment of the invention the first electrode is formed photolithographically with misalignment of a mask registration in the photolithography resulting in exposing surface portions of the barrier contact.
In accordance with still another embodiment of the invention, method is provided for forming an electrode in contact with a semiconductor substrate. The method includes forming a first dielectric layer on a surface of the substrate. A mask is provided over the first dielectric layer. The mask has a window over a selected portion of the surface of the substrate to expose an underlying portion of the first dielectric. The underlying portion of the dielectric layer is selectively removed to form a via through such first dielectric layer. The via exposes an underlying portion of the surface of the substrate. The mask is removed to expose the first dielectric layer and the via formed therein. An electrically conductive material is deposited over exposed first dielectric layer and through the via onto the exposed portion of the substrate. The upper portions of the conductive material are removed forming an upper surface of such material co-planar with the surface of the first dielectric layer. Portions of such conductive material pass through the via from the surface of the first dielectric layer to said exposed portion of substrate to provide a conductive plug through the first dielectric layer. An upper portion of the conductive plug is removed to provide a recess. The recess has portions of the dielectric layer providing sidewalls of the recess and an upper surface of the conductive plug providing a bottom of the recess. A barrier conductive layer is formed over the first dielectric layer with portions of the barrier conductive layer being disposed in the recess. Upper portions of the barri
Athavale Satish
Chaudhary Nirmal
Economikos Laertis
Jamin Fen F.
Kotecki David
Barreca Nicole
Huff Mark F.
Infineon Technologies North America Corp.
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