Semiconductor stack having a dielectric sidewall for prevention

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257 67, 257336, 257344, 257408, 257410, 257411, 257412, 257413, 257640, 257649, H01L 2976, H01L 2994, H01L 3162, H01L 2358

Patent

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057961514

ABSTRACT:
In an integrated circuit, gate electrode stack of which is subjected to self-alignment processes, the sheet resistance is lowered by including a tungsten layer 15. The tungsten layer 14 is protected by a sidewall material 21 of SiN.sub.x or SiO.sub.2 after an etching step which did not extend to the substrate 11. During a subsequent etching step in which the stack extends to the substrate 11, the sidewall material 31 acts as a hard mask protecting the upper portion of the stack. After the lower portion of the stack is protected by a re-oxidation layer 41, the entire stack can be processed further without deterioration of the sheet resistance of the tungsten layer 15.

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