Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device
Reexamination Certificate
1998-02-17
2001-04-10
Duda, Kathleen (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Making electrical device
C430S313000, C430S317000, C427S579000, C427S099300
Reexamination Certificate
active
06214526
ABSTRACT:
BACKGROUND OF THE INVENTION
As the dimensions of semiconductor devices have become smaller, the wavelength of the radiation that is used to expose the photoresist has also become smaller. The short-wavelength radiation is required for the resolution that is necessary to define the extremely minute features of these devices. “I-line” radiation with a wavelength (&lgr;) of 365 nm and deep ultraviolet (DUV) radiation with a wavelength of 248 nm are now in use and the introduction of radiation having a wavelength of 193 nm is foreseeable.
The use of short-wavelength radiation has the effect of increasing the reflectivity of the radiation at the interface between the photoresist layer and the underlying material, and this has led to thin film interference (TFI) effects, such as standing waves which produce variations in the dimensions of the features of the device and the exposure of normally unexposed areas from non-normal reflections (sometimes called “reflective notching”).
To overcome these problems, semiconductor device manufacturers have turned to the formation of antireflective layers (ARLs) underneath the photoresist. By means of negative interference and absorption, ARLs substantially reduce the amount of radiation that is reflected back into the photoresist layer where it can create the problems referred to above. See generally, De Jule, “Resist Enhancement With Antireflective Coating”, Semiconductor International, July 1996, p. 169 et seq.
A layer of silicon oxynitride (SiON) having a thickness in the range of 50 Å to 1 micron has been widely used as an ARL. While SiON has good functional qualities, a problem with SiON is that it can be etched only at a relatively slow rate. In many situations the ARL must be removed after the underlying layer has been patterned. Typically, the process sequence would be as follows. First, after the ARL and photoresist layer have been deposited, the photoresist layer is patterned. Second, the ARL exposed by the patterning of the photoresist is etched. Third, the underlying layer is patterned, using the photoresist as a mask. Fourth, the photoresist layer is removed. Fifth, the ARL is etched.
Silicon nitride (SiN
x
) has also been suggested for use as an ARL, in T. P. Ong et al., “CVD SiN
x
Anti-reflective Coating for Sub-0.5 &mgr;m Lithography”, 1996 Symposium on VLSI Technology Digest of Technical Papers, p 73 et seq.
In etching the ARL it is important to minimize the damage to the underlying, patterned layer. The slow etch rate of SiON creates problems in this regard. For example,
FIG. 1
shows a layer
10
of borophosphosilicate glass (BPSG) which has been patterned to form an aperture
14
for a contact. The difficulty of etching the ARL
12
has created an overhang of the BPSG layer
10
on either side of the aperture. Certain applications in logic, memory and flash technologies also require that the ARL be removed without doing damage to the underlying structure.
FIG. 2
shows a typical floating gate memory transistor
20
, including a gate oxide layer
21
, a floating polysilicon gate
22
, an oxide-nitride-oxide (ONO) layer
23
, a control gate
24
, an overlying oxide layer
25
, and an ARL
26
. In such devices, it is important that the gate oxide layer
21
, the ONO layer
23
and the oxide layer
25
remain unperturbed after the ARL
26
has been removed. Furthermore, in the fin-type capacitors used in certain DRAM designs, it is desirable to leave the oxide or ONO layer undamaged after the ARL has been etched.
Each device can be considered as having an “etch budget”, which is the amount of time during which the exposed structures can be subjected to etchant without undue damage. In many cases the removal of the silicon oxynitride and silicon nitride ARLs that have been developed until now exceeds this etch budget. Thus, a need exists for an ARL which can be removed relatively fast and without exceeding the etch budget.
SUMMARY OF THE INVENTION
In accordance with this invention, an ARL is formed of silicon nitride (Si
1−(x+y)
N
x
H
Y
). The ARL is formed in a plasma-enhanced chemical vapor deposition (PECVD) unit under process conditions that are designed to provide an ARL having the desired properties. These properties principally include thickness, refractive index (n), extinction coefficient (k), and etch rate. The values of n and k are a function of the wavelength of the radiation and the etch rate is a function of the etchant used.
The silicon nitride layer is formed by introducing gaseous ammonia (NH
3
) and silane (SiH
4
) into the reaction chamber of the PECVD unit in the presence of nitrogen (N
2
). The process conditions or parameters of this invention are principally the temperature of the reactant gases, the volumetric ratio of NH
3
to SiH
4
, and the rate at which radio frequency (RF) power is applied in the PECVD unit (per unit area of the surface of the wafer or other substrate on which the ARL is formed). The temperature should be in the range of 1500° C. to 4500° C.; the ratio of NH
3
to SiH
4
should be in the range of 1:1 to 6:1 or 7:1; and the RF power level should be in the range of from 0.02 W/cm
2
to 1.0 W/cm
2
, preferably about 0.12 W/cm
2
. If the temperature is greater than 390° C., the ratio of NH
3
to SiH
4
should be in the range of 1:1 to 6:1. For deep ultraviolet (DUV) radiation (&lgr;=248 nm), the temperature is preferably about 250° C. and the ratio of NH
3
to SiH
4
is preferably about 6:1. For i-line radiation (&lgr;=365 nm), the temperature is preferably about 400° C., and the ratio of NH
3
to SiH
4
is preferably about 3:1. For radiation at a wavelength of 193 nm, the temperature is preferably about 200° C., and the ratio of NH
3
to SiH
4
is preferably about 6:1.
Generally, lowering the temperature increases the etch rate and reduces the values of n and k, and lowering the ratio of NH
3
to SiH
4
reduces the etch rate and increases the values of n and k. Thus the selection of the actual process parameters involves a compromise of the desired properties of the ARL.
The process parameters used in accordance with this invention are clearly distinguishable from those used in the prior art to form silicon nitride layers, whether those layers are used as ARLs or as passivation layers in semiconductor devices or for other purposes. Silicon nitride layers are conventionally formed at a temperature of about 400° C. and with a ratio of NH
3
to SiH
4
of about 8:1. Ong et al., supra, for example, suggest using a low-pressure chemical vapor deposition (LPCVD) unit or “conventional large batch diffusion furnace”. Silicon nitride layers formed under such conditions do not exhibit the fast etch rate of the silicon nitride layers of this invention.
The silicon nitride ARL is typically 1 micron or less in thickness. The silicon nitride is distinguished in that in the formula Si
1−(x+y)
N
x
H
y
x is in the range 0.65-0.75 or y is in the range 0.25-0.50 and frequently in the range 0.30-0.50. While this level of hydrogen would normally create reliability problems in a transistor, these problems are not a factor in this situation because the ARL is removed. In other embodiments x may be in the range 0.20-0.50 or y may be in range 0.03-0.17. The particular percentage levels of the Si, N and H in the silicon nitride ARL will depend on the etchant used.
The etch rate of an ARL of this invention is determined by the process parameters and etchant and typically varies from 3000 Å/min to 20000 Å/min. By comparison, the etch rate of thermal SiO
2
in a 10:1 buffered oxide etchant HF (BOE-HF) is approximately 660 Å/min. The preferred etchant for the DUV ARL is BOE-HF and the preferred etchant for the i-line ARL is hot phosphoric acid.
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patent: 5284789 (1994-02-01), Mori et al.
patent: 5633191 (1997-05-01), Chao
patent: 5831321 (1998-11-01), Nagayama
patent: 5854136 (1998-12-01), Huang et al.
patent: 5858819 (1999-01-01), Miyasaka
patent: 5858870 (1999-01-01), Zheng et al.
patent: 5-129286 (1993-0
MacWilliams Kenneth P.
Mordo David
Sundararajan Srinivasan
Duda Kathleen
Novellus Systems Inc.
Skjerven Morril MacPherson LLP
Steuber David E.
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