Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Multiple layers
Reexamination Certificate
1998-06-26
2002-03-05
Whitehead, Jr., Carl (Department: 2822)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Multiple layers
C438S765000, C438S775000, C438S786000, C438S958000
Reexamination Certificate
active
06352940
ABSTRACT:
BACKGROUND INFORMATION
1. Field of the Invention
The present invention relates to the field of integrated circuit fabrication and more particularly to the passivation of integrated circuit devices.
2. Description of Related Art
As part of the manufacturing process of integrated circuit devices, these devices undergo a series of tests to evaluate their performance and their survival in the field. Typical tests performed on these devices include, but are not limited to moisture, impurity penetration, reliability, and thermal cycling. The stresses caused by these tests, such as thermal cycling, result in failure of particular areas in the integrated circuit devices subjected to the tests. One area of failure is at the interface of the oxide and passivation layers of these devices. The oxide layer serves to protect the underlying wafer. The passivation layer, also called the hard passivation layer, serves to protect the components of the integrated circuit device during the testing and packaging processes and during use. Of course, other components such as metal lines may be formed between the oxide and the hard passivation layers. During the thermal cycling process, a lifting or delamination has been observed to occur at this interface. Delamination between the hard passivation layer and oxide layer also occurs during the saw process where individual devices are separated from a wafer or die. The saw process induces stresses into the wafer resulting in delamination at the interface between these layers.
Delamination affects the integrity of the device, because the separated hard passivation layer no longer entirely serves as a protectant against moisture or contamination. Delamination also contributes to production of stringers, residual material that interfere with further processing and testing of the integrated circuit. These negative influences on integrated circuit device integrity cause the device to lose its robustness. A loss of robustness is equivalent to a yield loss as the integrated circuit device is no longer suitable for a prescribed use.
It is desirable to provide a process for improving the adhesion between the oxide and the hard passivation layers of integrated circuit devices to reduce the delamination that occurs during the manufacturing process of these devices, such as thermal cycling and sawing.
SUMMARY OF THE INVENTION
The present invention provides a method of passivating an integrated circuit (IC). An insulating layer is formed onto the IC. An adhesion layer is formed onto a surface of the insulating layer by treating the surface of the insulating layer with a gas. A first passivation layer is formed upon the adhesion layer. The first passivation layer and the gas include at least one common chemical element.
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Bakker Geoffrey L.
Dass M. Lawrence A.
Seshan Krishna
Blakely , Sokoloff, Taylor & Zafman LLP
Brophy Jamie L.
Intel Corporation
Jr. Carl Whitehead
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