Semiconductor memory device with high speed write operation

Details Semiconductor memory device with high speed write operation Semiconductor memory device with high speed write operation

1991-06-28

1993-09-21

Heyamn, John S.

Static information storage and retrieval

Read/write circuit

Precharge

365202, 365149, G11C 700

Patent

active

052474828

ABSTRACT:
A dynamic RAM for performing high speed write operation after performing read operation. The inventive device receives write data after pre-charging and equalizing a pair of bit lines, by using a equalization signal activated for a predetermined time, at a time point at which a write enabling signal begins to be activated. Provided between the bit lines is an equalization circuit having an NMOS transistor of which gate is connected to the equalization signal depending on the write enabling signal.

REFERENCES:
patent: 4736343 (1988-04-01), Hidaka et al.
patent: 4792928 (1988-12-01), Tobita
patent: 4813022 (1989-03-01), Matsui et al.
patent: 5036492 (1991-07-01), Runaldue

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