Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate
2005-01-11
2005-01-11
Le, Thong Q. (Department: 2818)
Static information storage and retrieval
Read/write circuit
Precharge
Reexamination Certificate
active
06842388
ABSTRACT:
The present invention is a semiconductor memory device provided with bit line pairs to which a plurality of memory cells are attached, a plurality of precharge circuits for precharging the bit line pairs to a first voltage that is different from a mean value between a high level and a low level, a bit line precharge power line for supplying the first voltage for precharging to the precharge circuits, a capacitor, a charging circuit for charging the capacitor, and transfer gate circuits for controlling connection and disconnection of the capacitor and the bit line precharge power line. The transfer gate circuits are controlled so that the capacitor and the precharge power line are connected during precharging of the bit line pairs. Thus, precharging of the bit lines can be performed at high speeds with high precision.
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Hirose Masanobu
Ohta Kiyoto
Origasa Kenichi
Le Thong Q.
Merchant & Gould P.C.
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