Semiconductor memory device of controlling bit line sense...

Details Semiconductor memory device of controlling bit line sense... Semiconductor memory device of controlling bit line sense...

2008-02-20

2010-11-23

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S208000

Reexamination Certificate

active

07839698

ABSTRACT:
A semiconductor memory device includes a memory core and an input/output circuit. The memory core amplifies a signal of a memory cell to output the amplified signal through an input/output line pair in a read mode, receives a signal of the input/output line pair to store in the memory cell in a write mode, and electrically separates a bit line pair from the input/output line pair in response to a read column selection signal, a write column selection signal and a first data masking signal. The input/output circuit buffers and provided a signal of the input/output line pair to input/output pins, receives input data from the input/output pins, and buffers the received input data to provide the buffered input data to the input/output line pair. Thus, the semiconductor device can perform a fast data writing operation.

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