Semiconductor memory device having means for providing a prechar

Static information storage and retrieval – Read/write circuit – Precharge

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Details

365190, 365207, 36523001, G11C 1300

Patent

active

049411284

ABSTRACT:
A dynamic type RAM is provided wherein the level of a precharge control signal supplied to a gate of a precharge MOSFET to precharge complementary data lines to a half level is made the half level during a period from the memory access until the selection of the word line, at the latest. Also, the precharge control signal, corresponding to a memory mat selected according to establishing of an address, is set to a low level, while the precharge control signal corresponding to a non-selective memory mat is set to a high level.

REFERENCES:
patent: 4780852 (1988-10-01), Kajigaya et al.
patent: 4807190 (1989-02-01), Ishii et al.

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