Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2005-03-08
2005-03-08
Dee, Duy-Vu N. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S697000, C438S699000, C438S700000, C438S703000, C438S704000
Reexamination Certificate
active
06864179
ABSTRACT:
A fabrication method for forming a semiconductor device having COB (capacitor-over-bit line) structure is provided. A lower insulating film is formed on a substrate. Bit line patterns are formed on a portion of the lower insulating film. Each of the bit line patterns comprises a conductive bit line, a lower capping strip and an upper capping strip, which are sequentially stacked. Mask-defining layer is formed on the other portion of the lower insulating film. The upper capping strips are removed by wet etching technique to form a recess region. The lower capping strips and a portion of the mask-defining layer is etched isotropically to enlarge the recess region. An insulating mask is formed in the enlarged recess region. BC (buried contact) holes are formed substantially in self-aligned manner to the bit lines by using the mask as an etch mask. According to the present invention, the unfavorable electrical contact between the storage electrodes and the bit lines can be significantly relieved.
REFERENCES:
patent: 6159820 (2000-12-01), Park
patent: 6174782 (2001-01-01), Lee
Dee Duy-Vu N.
Marger & Johnson & McCollom, P.C.
Samsung Electronics Co,. Ltd.
Tran Binh X.
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