Semiconductor memory device for testing redundancy cells

Details Semiconductor memory device for testing redundancy cells Semiconductor memory device for testing redundancy cells

2008-07-08

2008-07-08

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

Testing

C365S200000, C365S203000, C365S230060

Reexamination Certificate

active

11450318

ABSTRACT:
Provided is a semiconductor memory device. The semiconductor memory device includes: a memory cell array including regular cells; a redundancy memory cell array including redundancy cells for substituting for defective regular cells; a command decoder for generating an operation mode selection signal in response to command signals; a redundancy cell test controller for generating a test operation control signal and transmitting address signals in response to the operation mode selection signal; and a redundancy decoder for decoding the address signals to select the redundancy cells in response to the test operation control signal. All redundancy cells can be selected and tested based on the external command signal and the address signal, and thus it is possible to check all redundancy cells for defects in advance even after the semiconductor memory device is packaged, and to enable only non-defective redundancy cells to be substituted for defective regular cells. This increases the reliability of a repair operation.

REFERENCES:
patent: 5652725 (1997-07-01), Suma et al.
patent: 5898627 (1999-04-01), Yoshikawa
patent: 6396750 (2002-05-01), Honigschmid et al.
patent: 6603689 (2003-08-01), Kato et al.
patent: 6640321 (2003-10-01), Huang et al.
patent: 6847563 (2005-01-01), Koshikawa
patent: 7212455 (2007-05-01), Kuroki
patent: 2003/0039157 (2003-02-01), Bohm et al.
patent: 05-054690 (1993-03-01), None
patent: 11-242896 (1999-09-01), None
patent: 10-1998-0034257 (1998-08-01), None
patent: 10-2000-0004714 (2000-01-01), None

Affiliated with

Also associated with

Rating

Semiconductor memory device for testing redundancy cells does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device for testing redundancy cells, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device for testing redundancy cells will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3921019