Semiconductor memory device for enhancing bitline precharge...

Details Semiconductor memory device for enhancing bitline precharge... Semiconductor memory device for enhancing bitline precharge...

2005-02-15

2005-02-15

Dinh, Son T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Precharge

C365S189080, C365S194000

Reexamination Certificate

active

06856563

ABSTRACT:
A semiconductor memory device for enhancing bitline precharge time and method for accelerating precharge time in the device is provided which may reduce overall precharging time, in an effort to guarantee proper high speed operations in the semiconductor memory device. In the method, an equalization enable signal may be applied to an equalizer of the device to precharge a bitline pair connected a memory cell, isolation part and sense amplifier of the device. Isolation control signals, to be applied to one or more of the isolation parts, may be delayed by a given time, so that a time of applying the isolation control signals is after a time of applying the equalization enable signal to the equalizer.

REFERENCES:
patent: 5447498 (1995-09-01), Watson
patent: 5623446 (1997-04-01), Hisada et al.
patent: 6191988 (2001-02-01), DeBrosse
patent: 6256246 (2001-07-01), Ooishi

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