Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate
2008-02-22
2011-10-11
Ho, Hoai V (Department: 2827)
Static information storage and retrieval
Read/write circuit
Testing
Reexamination Certificate
active
08036052
ABSTRACT:
Example embodiments disclose a semiconductor memory device and a test method thereof. The semiconductor memory device includes a memory cell array that provides first and second data groups at a first data rate and an output circuit, in a normal mode of operation, serially outputs the first and second data groups at a first data rate on an external terminal. In a test mode of operation, the output circuit outputs the first data group or the second data group at a second data rate on the external terminal in response to control signals, without switching the test mode. The second data rate may be lower than the first data rate.
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Jun Chan-sub
Lee Hyong-yong
Harness & Dickey & Pierce P.L.C.
Ho Hoai V
Samsung Electronics Co,. Ltd.
Tran Anthan
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