Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate
2005-07-05
2005-07-05
Auduong, Gene N. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Precharge
C365S189090
Reexamination Certificate
active
06914835
ABSTRACT:
There is provided a semiconductor memory device in which a bit line precharge operation is increased in speed, and a layout area is reduced. P-channel transistors (206, 207) that function as switches are provided in a precharge voltage pumping circuit (105) included in a bit line precharge voltage generation unit. This enhances a pumping efficiency, and reduces a capacitance area of a pumping capacitor (200).
REFERENCES:
patent: 5914867 (1999-06-01), Pascucci
patent: 6201378 (2001-03-01), Eto et al.
patent: 6326837 (2001-12-01), Matano
patent: 6452833 (2002-09-01), Akita et al.
patent: 6842388 (2005-01-01), Origasa et al.
patent: 2003/0095430 (2003-05-01), Origasa et al.
patent: 2000-30450 (2000-01-01), None
patent: 2003-157674 (2003-05-01), None
Iida Masahisa
Nakamura Toshihiro
Origasa Kenichi
Ota Kiyoto
Auduong Gene N.
Hamre Schumann Mueller & Larson P.C.
LandOfFree
Semiconductor memory device, and semiconductor device with... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device, and semiconductor device with..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device, and semiconductor device with... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3432856