Semiconductor memory device and method for reading and writing d

Details Semiconductor memory device and method for reading and writing d Semiconductor memory device and method for reading and writing d

1997-08-25

2000-04-11

Dinh, Son T.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365190, 365205, G11C 700

Patent

active

RE0366552

ABSTRACT:
An NAND gate for outputting an output establishment detection signal in response to the fact that a complementary output of a latch type sense amplifier has been established is provided. When a tristate buffer is activated by signal, a word line which has been in a selected state is rendered non-selected state. Accordingly, current can be prevented from leaking from a power supply line to a ground line in tristate buffer. In addition, column current Ic flowing through memory cells can be minimized in response to the fact that word line has been set to a selected state.

REFERENCES:
patent: 4730279 (1988-03-01), Ohtani et al.
patent: 4876669 (1989-10-01), Yamamoto et al.
patent: 5295098 (1994-03-01), Kohmo
patent: 5384736 (1995-01-01), Jung et al.
patent: 5392249 (1995-02-01), Kan

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