Semiconductor memory device and defect remedying method thereof

Details Semiconductor memory device and defect remedying method thereof Semiconductor memory device and defect remedying method thereof

2005-05-24

2005-05-24

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Multiplexing

C365S051000, C365S053000, C365S063000

Reexamination Certificate

active

06898130

ABSTRACT:
A semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. This structure in which the peripheral circuits are arranged at the center portion of the chip permits the longest signal transition paths to be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.

REFERENCES:
patent: 5534724 (1996-07-01), Nagamine
Nikkei Electronics, 1987, 4.6/No. 418, pp. 168-184.

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